1. Field
The present disclosure relates generally to network security and, more specifically, to apparatuses and methods for performing RC4 ciphering.
2. Description
Networks enable computers and other devices to communicate. For example, networks can carry data representing video, audio, e-mail, and so forth. However, network systems are subject to many threats, including loss of privacy, loss of data integrity, identity spoofing, and denial-of-service attacks. To address these threats, many measures have been developed and employed to improve the security of network communications. For example, a Rivest Cipher 4 (RC4) algorithm is selected by the Wired Equivalent Privacy (WEP), part of the IEEE 802.11 standard, to secure Wireless Fidelity (“WiFi”) networks, and by the Secure Sockets Layer (SSL) communications protocol to improve the security of communications on the Internet.
The RC4 algorithm is a symmetric key stream cipher algorithm. A symmetric key algorithm is an algorithm for cryptography that uses the same cryptographic key to encrypt and decrypt the message. Symmetric key algorithms can be divided into stream ciphers and block ciphers. Stream ciphers encrypt the bits of the message one at a time, and block ciphers take a number of bits and encrypt them as a single unit. The RC4 ciphering process operates as a pseudo-random number generator initialized from a secret key of up to 256 bytes. The RC4 ciphering process generates a series of bytes, called a key stream. Input text data (“plain text”) is encrypted by performing an exclusive-or (“XOR”) operation between the plain text and the key stream. The result of the XOR operation is a cipher text corresponding to the input text data. Decryption is performed by producing the same key stream and XORing it with the cipher text to reproduce the plain text. If the RC4 ciphering process is implemented in hardware, it may be more desirable to use less complex hardware components than more complex hardware components because less complex components may be more commonly available. Also in a hardware implementation, smaller die area translates to lower costs, higher yields, and often lower power, which are beneficial to network communications.